The present invention relates to an image sensing pixel cell architecture, and particularly to a pixel cell architecture that employs complementary metal oxide semiconductor (CMOS) devices. More particularly still, the present invention relates to an image sensing pixel cell architecture that can provide high sensitivity, relatively lag-free response and an electronic shutter.
Recently, CMOS image sensors characterized by their low power consumption have been in great demand as an image capturing device for portable devices, such as digital cameras. It is desirable to have these portable devices capture images of fast moving objects. In order to get these images, typical image sensors open the shutter for only a short period of time. However, when the shutter is open for only a short period of time, only a small amount of light is captured. This small amount of light makes it difficult for the image sensor to output a signal that varies with the amount of light captured (i.e., small differences in the amount of light may result in the same output signal). Typically, CMOS image sensors accommodate for this short shutter open period by providing a pixel architecture having a high sensitivity. Unfortunately, the high sensitivity is provided at a cost of lag that results in a blurred image. Therefore, there is a need for a CMOS image sensor having a pixel cell architecture that provides increased sensitivity while providing relatively lag free operation.
In accordance with the present invention, a pixel cell architecture provides for a high sensitivity and relatively lag-free response. The pixel cell architecture is configured to maintain a relatively constant voltage across a photodiode so that a photocurrent is not integrated on the photodiode depletion layer capacitance, but rather on another capacitance, which allows a larger output voltage. The capacitance is substantially associated with a first node. In one embodiment, a capacitor is coupled to the first node. In another embodiment, the capacitance is a parasitic capacitance associated with the first node. In one aspect of the invention, an image sensing pixel cell includes a reset circuit, a capacitance, a photodiode, a unity gain current buffer, and a voltage buffer. The reset circuit couples an initial voltage to a first node at an initial time where the capacitance stores the initial voltage. The unity gain current buffer is arranged to bias the photodiode at a relatively constant voltage. The voltage buffer circuit buffers the first node to produce a second voltage that corresponds to the voltage at the first node at a subsequent time. The second voltage is different from the initial voltage when a photocurrent flows in the photodiode. The unity gain current buffer includes a transfer gate transistor and an amplifier circuit. The amplifier circuit is employed to adjust a gate voltage on the transfer gate transistor in a manner to maintain the relatively constant voltage on the photodiode. The gate voltage being adjusted based on the photocurrent flowing in the photodiode. In a further aspect of the invention, the imaging sensing pixel cell includes a select circuit that selectively couples the second voltage to a column output of the pixel cell when selected. In one embodiment, the select circuit is a MOS transistor.
In another embodiment of the invention, the amplifier circuit includes an operational amplifier having an inverting input, a non-inverting input and an output. The inverting input is coupled to the photodiode and the non-inverting input is coupled to a reference voltage. The output is arranged to bias the photodiode at the reference voltage. In a further aspect of this embodiment, the transfer gate transistor includes a MOS transistor having a gate which is coupled to the output of the operational amplifier. The MOS transistor conducts a current corresponding to the photocurrent. In another embodiment, the amplifier circuit includes a common source amplifier.
In another embodiment of the invention, the voltage buffer circuit is a source follower circuit. In a further aspect of this embodiment, the capacitance associated with the first node is dominated by a capacitance of the source follower.
In yet another embodiment of the invention, the pixel cell further includes a shutter circuit having a closed position and an open position. The shutter circuit is configured to provide a first conductive path for the photocurrent between the photodiode and a power supply connection when in the closed position. The shutter circuit is also configured to provide a second conductive path for the photocurrent between the photodiode and the first node when in the open position. In a Further aspect of this embodiment, the shutter circuit includes a first and a second MOS transistor sharing a common drain connection that is coupled to the photodiode. The first transistor is arranged to provide the first conductive path and the second transistor is arranged to provide the second conductive path. In another aspect of this embodiment, the shutter circuit includes a first and a second MOS transistor sharing a common source connection that is coupled to the photodiode. The first transistor is arranged to provide the first conductive path and the second transistor is arranged to provide the second conductive path.
In still another embodiment, the pixel cell further includes a shutter circuit having a first and a second MOS transistor sharing a common source connection that is coupled to the photodiode. The first transistor is arranged to selectively couple the photocurrent to the power supply connection and the second transistor is arranged to selectively couple the photocurrent to the first node. The first and second MOS transistors each have a shutter control coupled to their respective gates. The shutter control is arranged to prevent charge from being injected into the first node. In a further aspect of this embodiment, each shutter control includes a first and a second switching transistor. The first switching transistor couples the output of the amplifier circuit to the respective gate and the second switching transistor couples the respective gate to a circuit ground. The first and second switching transistors are active at different times.
In another aspect of the invention, an image sensing pixel cell circuit includes a reset means, a storage means, an image sensing means, a bias means, and a buffer means. At an initial time, the reset means couples an initial voltage to a storage node where the storage means stores the initial voltage. The bias means maintains a bias voltage across the image sensing means. The bias means includes a transfer gate transistor and an amplifier means. The amplifier adjusts a gate voltage on the transfer gate transistor based on the current flowing in the sensing means in a manner to maintain the relatively constant voltage on the photodiode. The image sensing means produces a current in response to sensing a portion of an image associated with the pixel cell such that when the current flows in the sensing means, a subsequent voltage at the storage node is produced. The subsequent voltage is different from the initial voltage. The buffer means buffers the storage node to produce an output voltage at an output node such that the output voltage corresponds to the portion of the image sensed by the image sensing means.
In one embodiment, the reset means includes a PMOS transistor and the initial voltage is a power supply voltage. In another embodiment, the buffer means is a source follower circuit and the storage means includes a capacitance associated with the source follower circuit. In yet another embodiment, the amplifier means includes an operational amplifier. The operational amplifier has an inverting input coupled to the image sensing means, a non-inverting input coupled to a reference voltage, and an output arranged to bias the image sensing means at the reference voltage.
In a further embodiment, the image sensing pixel cell circuit further includes a shutter means having an open position and a closed position. The shutter means providing a conductive path for the photocurrent between the image sensing means and a power supply connection when in a closed position, and the shutter means providing another conductive path for the photocurrent between the image sensing means and the storage node when in the open position.
In yet a further embodiment, the image sensing pixel cell circuit includes a means for preventing charge injection. The means for preventing charge injection prevents charge from being injected into the storage node from the shutter means.
In yet another aspect of the invention, a method for sensing an image using an array of pixel cells each having a shutter that opens and closes is provided. The photodiode is biased at a relatively constant voltage. Each pixel cell in the array is reset at substantially the same time. The shutter opens so that a photocurrent can integrate on a capacitor in each pixel cell of the entire pixel array. The shutter then closes and image data is read from each pixel cell. The image data corresponds to the integrated photocurrent stored on the capacitor of each of the array of pixel cells. In one embodiment, reading image data from each pixel includes determining a voltage stored on the capacitor of each array of pixel cells. In another embodiment, the image data may be a voltage, a current, or a digital representation. In accordance with this aspect of the invention, the image data that is read further includes reading a first data at a first time and reading a second data at a second time. The difference between the first and second data corresponds to the image data. The first and second data may be a voltage, a current, or a digital representation. In a further aspect, integrating the photocurrent on the capacitor includes maintaining a voltage across the photodiode, producing a photocurrent through the photodiode when a portion of the image is sensed and changing the voltage on the capacitor in response to the photocurrent.
In one embodiment, the resetting of the array of pixel cells includes initializing the capacitor to an initial voltage. In another embodiment, opening the shutter for the entire array of pixel cells enables each capacitor of each pixel cell to integrate its respective photocurrent, while closing the shutter disables each capacitor of each pixel cell from integrating its respective photocurrent.